CS1034 Computer Architecture May June 2014 Question Paper

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Full Name :Arumugam.P
College Name :SNS College Of Technology
Department :EEE
Semester :07
Subject Code :CS1034
Subject Name :Computer Architecture
Study Material Description :QP

Question Paper Code: 53301
B.E. / B.Tech. DEGREE EXAMINATION, MAY/JUNE 2014.
Seventh Semester
Electrical and Electronics Engineering
CS 1034 --- COMPUTER ARCHITECTURE,
(Common' to Electronics and Instrumentation Engineering and Instrumentation andControl Engineering)
(Regulation 2004)
(Common to B.E. (part-Time) Seventh Semester Electrical and Electronics Engineering, Regulation 2005)
Time: Three hours
Maximum: 10 marks
Answer ALL questions:

PART A - (10 x 2 = 20 marks)
1. What is meant by error detection codes? Give' an example.
2. What is MAR and MBR? What will be the content of MAR and MBR during read and write operations?
3. Distinguish between hardwired and micro programmed control unit.
4. A computer has 32:bit instructions and 12-bit addresses.' If there are 250 two-address instructions, 'how many one-address instructions can be formulated?
5. Sketch a 2·bit by 2-bit array multiplier.
6. What are the factors that affect the performance of the pipe lining process? ' ,
7. What is the need for synchronization in 110 data transfer?
8. When is burst transfer preferred over, cycle stealing?
9. What is the need tor memory hierarchy? Draw the memory hierarchy of a computer system.
10. A 16 MB main memory-has a 32 KB direct-mapped cache with 8 bytes per line.
(a) How .many lines are there' in the cache?
(b) How is the main memory address partitioned?

Attachment :

  CA MJ2014.pdf (Size: 1.67 MB / Downloads: 190)

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