EC6303 Signals and Systems Scanned Lecture Notes - Sreedhar Edition

[Srini]

   

Anna University , Chennai

Department of B.E. Electronics and Communication Engineering

Third Semester

EC6303 Signals and Systems

Scanned Lecture Notes (All Units) - Sreedhar Edition

(Common to Bio-medical Engineering)

(Regulation 2013)

 Attachment : Click Here

Content :
SIGNALS AND SYSTEM

UNIT-1
Basic elements of DSP
Advantages of DSP
Standard discrete time signal
Graphical representation
Tabular representation
Sequence representation
Signal
1. Continuous time signal
2. Discrete time signal
Classification of discrete time signal
Sampling theorem
Convolution
Linear convolution
Circular convolution
Correlation
Auto correlation
Circuit correlation
Z-transform
1. Linearity
2. Shifting property
3. Convolution property
4. Initial value theorem
5. Final value theorem
6. Parseval’s relation

UNIT-2
Z-transform
Inverse z-transform
Properties
1. Linearity
2. Shifting property
3. Convulation property
4. Initial value theorem
5. Final value theorem
Parsevals relation
Convolution
Linear convolution
Circular convolution
Correlation
1. Auto correlation
2. Cross correlation

UNIT-3
Discrete fourier transform
Relation between DFT and DTFT
properties of DFT
problems based on direct DFT method
fast fourier transform
1. Descimation in time
2. Descimation in frequency
Difference between DIT and DFT
Linear filtering
1. Overlap serve method
2. Overlap add method

UNIT-4
DESIGN OF DIGITAL FILTERS
IIR FILTER
Stability condition for analog filter
Stability condition for digital filters
Features of IIR filters
Components of digital and analog filters
Properties of butterworth filters
Design for low pass filters
Properties of chebyehevir filters
Design filters
Impulse inverient techniques
Relation between analog and digital poles
Frequency transformation
IIR filters structures 
1. Direct form-1
2. Direct form-2

UNIT-5
DIGITAL SIGNAL PROCESSOR
Manufactures
Generation-digital signal processor
Processor-architecture
Von Neumann architecture
1. Data bus
2. Address bus
3. Control bus
Harvard architecture
Modified architecture
VLIW architecture
Advantages disadvantages
Multiply accumulate unit
Characteristics of a fixed point MAC
Pipelining
Basic operation of microprocessor
1. Fetch
2. Decode
3. Memory read
4. Excute phase
Pipeline in different TMS320 processor
Addressing modes
1. Immediate addressing
2. Indirect addressing
3. Register addressing
4. Memory mapped register addressing
5. Direct addressing
6. Circular addressing mode
TMS 320C50 processor
Features of TMS320C50
Program controller
1. Program counter
2. Status and control register
3. Hardware stack
4. Address generation logic
5. Instruction register
On chip memory
On chip peripherals
Clock generator
Hardware timer
Serial port
Instruction set
Load instruction

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