CS8382 Digital Systems Lab Manual with VIVA Questions

[Srini]

   

Dhanalakshmi College of Engineering

Manimangalam, Tambaram, Chennai – 601 301

DEPARTMENT OF COMPUTER SCIENCE ENGINEERING

III SEMESTER - R 2017

CS8382 DIGITAL SYSTEMS LABORATORY

Lab Manual with VIVA Questions

List of Experiments :
1. Verification of Boolean Theorems using Digital Logic Gates
2. Design and Implementation of Combinational Circuits using Basic Gates for Arbitrary Functions, Code Converters
3. Implementation of half adder and full adder
4. Implementation of half subtractor and full subtractor
5. Design and Implementation of 4-Bit Binary Adder / Subtractor using Basic Gates and MSI Devices
6. Design and Implementation of Parity Generator / Checker using Basic Gates and MSI Devices
7. Design and Implementation of Magnitude Comparator.
8. Design and Implementation of Application using Multiplexers / Demultiplexers.
9. Design and Implementation of Shift Registers.
10. Design and Implementation of Synchronous and Asynchronous Counters.
11. Simulation of Combinational Circuits using Hardware Description Language (VHDL / Verilog HDL Software Required).
12. Simulation of Sequential Circuits using HDL (VHDL / Verilog HDL Software Required)

Attachment : 
  CS8382 DS Lab Manual.pdf (Size: 2.33 MB / Downloads: 8,073)

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