Advanced Computer Architecture Premium Lecture Notes, Prepared by Venkat raman. Specially for Computer Science Engineering . Syllabus Covered based on Anna University B.E Computer Science Engineering
CONTENT:
UNIT-3 MULTIPROCESSOR AND THREAD LEVEL PARALLEISM (Pages:18)
UNIT-4 MEMORY AND I/O (Pages:22)
UNIT-5 MULTI CORE ARCHITECTURE (Pages:29)
Attachment: click hereUNIT-3
MULTIPROCESSOR AND THREAD LEVEL PARALLEISM
Synchronization
Atomatic operation
Hardware primitives
Atomatic exchange
Test and set
Fetch and increment
User level synchronization
Two consistency
1. Sequential consistency model
2. Relaxed consistency model
Memory consistency model
Private data
UNIT-4
MEMORY AND I/O
Various techniques for reducing cache miss penality
Five optimization
1. Multilevel caches
2. Critical word first
3. Giving priority to read miss over write
4. Merging write buffer
5. Victim cache
Column associativity
Compiler optimization
Blocking operation on SOB matrics
Reduce hit time
Average memory access time
Fast hit time
Four twchniques
Small and simple cache
Guide line
Drawbacks
Various measure of input and output
Latency
Shared data
Coherent memory system
1. Coherent view of memory
2. Write serialization
Basic scheme enforcing coherence
Migration
Replication
Two class of cache coherence protocol
1. Snooping
2. Directory based
Basic snoopy protocol
UNIT-5
MULTI CORE ARCHITECTURE
IBM cell processor
General over view
Power Processor Element (PPE)
PPE made out of two main units
1. Power processor unit
2. Power processor storage sub system
Memory flow controller
Multicore architecture
Multicore
Hyper threading
Multicore processor
Fundamental relationship between frequency and power
Intel multicore architecture
Benefits
CMP architecture
Simultaneous multithread
Multiprocessor
Performance improvement
1. Issue slot
2. Renaming register
Attachment: click here
