Computer Organization And Architecture Premium Lecture Notes, Prepared by Venkat Raman. Specially for Computer Science Engineering . Syllabus Covered based on Anna University B.E Computer Science Engineering.
CONTENT:
UNIT-1 BASIC STRUCTURE OF COMPUTERS (Pages:53)
UNIT-4 MEMORY SYSTEM (Pages:41)
UNIT-5 I/O ORGANIZATION (Pages:40)
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UNIT-1
BASIC STRUCTURE OF COMPUTERS
Role of system software
Hardware and software interface
Physical components
Software
1. System software
2. Application software
Operating system
1. Process management
2. Main memory management
3. File management
4. Input and output management
5. Secondary storage management
Application software
Multi programming
Connection between processor and memory
Instruction execution
Instruction register
Memory
1. Memory address register
2. Memory data register
Typical operating steps
Memory read operation
Address instruction
1. 3 address instruction
2. Two address instruction
3. One address instruction
4. Zero address instruction
Straight line sequencing
Instruction fetch cycle
Instruction decode cycle
Branching
Branch target
Immediate address mode
1. Indirect address mode
2. Direct address mode
3. Register addressing
4. Application
5. Multi level indirect addressing
6. Auto increment or decrement
7. Stack addressing
Booth’s multiplication algorithm
Floating point addition
Basic computer organization
Input unit
CPU unit
Memory unit
Primary memory
Random access memory
Arithmetic logic unit
Control unit
Classification of instruction
1. Data transfer instruction
2. Arithmetic instruction
3. Logical instruction
4. Control transfer instruction
5. String instruction
6. Translate instruction
UNIT-4
MEMORY SYSTEM
Different secondary storage device
Functionality of magnetic disk
1. Digital information
Information about read/write head
Access of data on disk
Unformatted disk
Track and sector
Access time
1. Selection time
2. Rotational delay
Typical disk
Disk controller
Main memory address
Single density
Floppy disk
Double density
Advantages
Disadvantages
Virtual memory
Memory management unit
Asynchronous DRAM
CMOS cell
Mapping techniques
Direct mapping
Replacement algorithm
UNIT-5
I/O ORGANIZATION
Interrupt
Interrupt service routine
Interrupt hardware
Polling scheme
Interface circuit
USB architecture
Distribution arbitration
1. Self selection
2. Collision
Collision detection
Bus performance
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